diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 8f67f9f..540b9d3 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -28,33 +28,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define BOARD_CMPC885		"cmpc885"
-#define BOARD_MCR3000_2G	"mcr3k_2g"
-#define BOARD_VGOIP		"vgoip"
-#define BOARD_MIAE		"miae"
-
-#define TYPE_MCR	0x22
-#define TYPE_MIAE	0x23
-
-#define FAR_CASRSA     2
-#define FAR_VGOIP      4
-#define FAV_CLA        7
-#define FAV_SRSA       8
-
 #define ADDR_CPLD_R_RESET		((unsigned short __iomem *)CONFIG_CPLD_BASE)
 #define ADDR_CPLD_R_ETAT		((unsigned short __iomem *)(CONFIG_CPLD_BASE + 2))
 #define ADDR_CPLD_R_TYPE		((unsigned char  __iomem *)(CONFIG_CPLD_BASE + 3))
 
-#define ADDR_FPGA_R_BASE		((unsigned char  __iomem *)CONFIG_FPGA_BASE)
-#define ADDR_FPGA_R_ALARMES_IN		((unsigned char  __iomem *)CONFIG_FPGA_BASE + 0x31)
-#define ADDR_FPGA_R_FAV			((unsigned char  __iomem *)CONFIG_FPGA_BASE + 0x44)
-
 #define PATH_PHY2			"/soc@ff000000/mdio@e00/ethernet-phy@2"
 #define PATH_PHY3			"/soc@ff000000/mdio@e00/ethernet-phy@3"
 #define PATH_ETH1			"/soc@ff000000/ethernet@1e00"
 #define FIBER_PHY PATH_PHY2
 
-#define FPGA_R_ACQ_AL_FAV	0x04
 #define R_ETAT_PRES_BASE	0x0040
 
 #define R_RESET_STATUS		0x0400
@@ -62,8 +44,6 @@
 
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
-	u8 fav_id, far_id;
-
 	const char *sync = "receive";
 
 	ft_cpu_setup(blob, bd);
@@ -87,32 +67,19 @@
 	do_fixup_by_path(blob, "/localbus/e1", "rising-edge-sync-pulse", sync, strlen(sync), 1);
 
 	/* MIAE only */
-	if (!(in_be16(ADDR_CPLD_R_ETAT) & R_ETAT_PRES_BASE) || in_8(ADDR_FPGA_R_BASE) != TYPE_MIAE)
+	if (!(in_be16(ADDR_CPLD_R_ETAT) & R_ETAT_PRES_BASE))
 		return 0;
 
-	far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
-	ft_cleanup(blob, (u32)far_id, "far-id", "cs,mia-far");
+	return ft_board_setup_common(blob);
+}
 
-	/*
-	 * special case, with CASRSA (far_id: 2)
-	 * FAV-SRSA register itself as FAV-CLA
-	 */
-	fav_id = in_8(ADDR_FPGA_R_BASE + 0x44) >> 5;
+void ft_board_setup_phy3(void)
+{
+	/* switch to phy3 with gpio, we'll only use phy3 */
+	immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
+	cpm8xx_t __iomem *cp = (cpm8xx_t __iomem *)&immr->im_cpm;
 
-	if (far_id == FAR_CASRSA && fav_id == FAV_CLA)
-		fav_id = FAV_SRSA;
-
-	ft_cleanup(blob, (u32)fav_id, "fav-id", "cs,mia-fav");
-
-	if (far_id == FAR_CASRSA) {
-		/* switch to phy3 with gpio, we'll only use phy3 */
-		immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
-		cpm8xx_t __iomem *cp = (cpm8xx_t __iomem *)&immr->im_cpm;
-
-		setbits_be32(&cp->cp_pedat, 0x00002000);
-	}
-
-	return 0;
+	setbits_be32(&cp->cp_pedat, 0x00002000);
 }
 
 int checkboard(void)
@@ -120,30 +87,11 @@
 	serial_puts("Board: ");
 
 	/* Is a motherboard present ? */
-	if (in_be16(ADDR_CPLD_R_ETAT) & R_ETAT_PRES_BASE) {
-		switch (in_8(ADDR_FPGA_R_BASE)) {
-			int far_id;
-		case TYPE_MCR:
-			printf("MCR3000_2G (CS GROUP)\n");
-			break;
-		case TYPE_MIAE:
-			far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+	if (in_be16(ADDR_CPLD_R_ETAT) & R_ETAT_PRES_BASE)
+		return checkboard_common();
 
-			if (far_id == FAR_VGOIP)
-				printf("VGoIP (CS GROUP)\n");
-			else
-				printf("MIAE (CS GROUP)\n");
+	printf("CMPC885 (CS GROUP)\n");
 
-			break;
-		default:
-			printf("Unknown\n");
-			for (;;)
-				;
-			break;
-		}
-	} else {
-		printf("CMPC885 (CS GROUP)\n");
-	}
 	return 0;
 }
 
@@ -174,57 +122,12 @@
 
 int misc_init_r(void)
 {
-	u8 val, tmp, far_id;
-	int count = 3;
-
-	val = in_8(ADDR_FPGA_R_BASE);
-
 	/* Verify mother board presence */
 	if (in_be16(ADDR_CPLD_R_ETAT) & R_ETAT_PRES_BASE) {
-		/* identify the type of mother board */
-		switch (val) {
-		case TYPE_MCR:
-			/* if at boot alarm button is pressed, delay boot */
-			if ((in_8(ADDR_FPGA_R_ALARMES_IN) & FPGA_R_ACQ_AL_FAV) == 0)
-				env_set("bootdelay", "60");
-
-			env_set("config", BOARD_MCR3000_2G);
-			env_set("hostname", BOARD_MCR3000_2G);
-			break;
-
-		case TYPE_MIAE:
-			do {
-				tmp = in_8(ADDR_FPGA_R_BASE + 0x41);
-				count--;
-				mdelay(10); /* 10msec wait */
-			} while (count && tmp != in_8(ADDR_FPGA_R_BASE + 0x41));
-
-			if (!count) {
-				printf("Cannot read the reset factory switch position\n");
-				hang();
-			}
-
-			if (tmp & 0x1)
-				env_set_default("Factory settings switch ON", 0);
-
-			env_set("config", BOARD_MIAE);
-			far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
-
-			if (far_id == FAR_VGOIP)
-				env_set("hostname", BOARD_VGOIP);
-			else
-				env_set("hostname", BOARD_MIAE);
-			break;
-
-		default:
-			env_set("config", BOARD_CMPC885);
-			env_set("hostname", BOARD_CMPC885);
-			break;
-		}
+		misc_init_r_common();
 	} else {
-		printf("no mother board detected");
-		env_set("config", BOARD_CMPC885);
-		env_set("hostname", BOARD_CMPC885);
+		env_set("config", CFG_BOARD_CMPCXXX);
+		env_set("hostname", CFG_BOARD_CMPCXXX);
 	}
 
 	if (setup_mac())
@@ -236,7 +139,7 @@
 	return 0;
 }
 
-static void iop_setup_mcr(void)
+void iop_setup_mcr(void)
 {
 	immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	iop8xx_t __iomem *iop = &immr->im_ioport;
@@ -539,7 +442,7 @@
 	clrbits_be32(&cp->cp_peso, 0x00031980);
 }
 
-static void iop_setup_miae(void)
+void iop_setup_miae(void)
 {
 	immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	iop8xx_t __iomem *iop = &immr->im_ioport;
@@ -549,7 +452,7 @@
 	udelay(100);
 
 	/* Set the front panel LED color to red */
-	clrbits_8(ADDR_FPGA_R_FAV, 0x02);
+	clrbits_8((unsigned char  __iomem *)CONFIG_FPGA_BASE + 0x44, 0x02);
 
 	/* We must initialize data before changing direction */
 	setbits_be16(&iop->iop_pcdat, 0x0888);
@@ -1007,20 +910,7 @@
 			mdelay(200);
 		}
 
-		/* Identify the type of mother board */
-		switch (in_8(ADDR_FPGA_R_BASE)) {
-		case TYPE_MCR:
-			iop_setup_mcr();
-			break;
-
-		case TYPE_MIAE:
-			iop_setup_miae();
-			break;
-
-		default:
-			break;
-		}
-	/* CMPC885 board alone */
+		iop_setup_common();
 	} else {
 		iop_setup_cmpc885();
 	}
diff --git a/board/cssi/common/common.c b/board/cssi/common/common.c
index de68e23..7ecf772 100644
--- a/board/cssi/common/common.c
+++ b/board/cssi/common/common.c
@@ -9,8 +9,26 @@
  */
 
 #include <dm.h>
+#include <env.h>
 #include <fdt_support.h>
+#include <hang.h>
 #include <spi.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+
+#include "common.h"
+
+#define ADDR_FPGA_R_BASE		((unsigned char  __iomem *)CONFIG_FPGA_BASE)
+
+#define FPGA_R_ACQ_AL_FAV	0x04
+
+#define TYPE_MCR			0x22
+#define TYPE_MIAE			0x23
+
+#define FAR_CASRSA     2
+#define FAR_VGOIP      4
+#define FAV_CLA        7
+#define FAV_SRSA       8
 
 #define SPI_EEPROM_READ	0x03
 
@@ -36,7 +54,7 @@
 }
 
 /* Checks front/rear id and remove unneeded nodes from the blob */
-void ft_cleanup(void *blob, unsigned long id, const char *prop, const char *compatible)
+static void ft_cleanup(void *blob, unsigned long id, const char *prop, const char *compatible)
 {
 	int off;
 
@@ -95,3 +113,107 @@
 
 	return 0;
 }
+
+int ft_board_setup_common(void *blob)
+{
+	u8 far_id, fav_id;
+
+	if (in_8(ADDR_FPGA_R_BASE) != TYPE_MIAE)
+		return 0;
+
+	far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+	ft_cleanup(blob, far_id, "far-id", "cs,mia-far");
+
+	fav_id = in_8(ADDR_FPGA_R_BASE + 0x44) >> 5;
+
+	if (far_id == FAR_CASRSA && fav_id == FAV_CLA)
+		fav_id = FAV_SRSA;
+
+	ft_cleanup(blob, fav_id, "fav-id", "cs,mia-fav");
+
+	if (far_id == FAR_CASRSA)
+		ft_board_setup_phy3();
+
+	return 0;
+}
+
+int checkboard_common(void)
+{
+	switch (in_8(ADDR_FPGA_R_BASE)) {
+		int far_id;
+	case TYPE_MCR:
+		printf("MCR3000_2G (CS GROUP)\n");
+		break;
+	case TYPE_MIAE:
+		far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+
+		if (far_id == FAR_VGOIP)
+			printf("VGoIP (CS GROUP)\n");
+		else
+			printf("MIAE (CS GROUP)\n");
+
+		break;
+	default:
+		printf("Unknown\n");
+		for (;;)
+			;
+		break;
+	}
+	return 0;
+}
+
+void misc_init_r_common(void)
+{
+	u8 tmp, far_id;
+	int count = 3;
+
+	switch (in_8(ADDR_FPGA_R_BASE)) {
+	case TYPE_MCR:
+		/* if at boot alarm button is pressed, delay boot */
+		if ((in_8(ADDR_FPGA_R_BASE + 0x31) & FPGA_R_ACQ_AL_FAV) == 0)
+			env_set("bootdelay", "60");
+
+		env_set("config", CFG_BOARD_MCR3000_2G);
+		env_set("hostname", CFG_BOARD_MCR3000_2G);
+		break;
+
+	case TYPE_MIAE:
+		do {
+			tmp = in_8(ADDR_FPGA_R_BASE + 0x41);
+			count--;
+			mdelay(10); /* 10msec wait */
+		} while (count && tmp != in_8(ADDR_FPGA_R_BASE + 0x41));
+
+		if (!count) {
+			printf("Cannot read the reset factory switch position\n");
+			hang();
+		}
+
+		if (tmp & 0x1)
+			env_set_default("Factory settings switch ON", 0);
+
+		env_set("config", CFG_BOARD_MIAE);
+		far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+
+		if (far_id == FAR_VGOIP)
+			env_set("hostname", CFG_BOARD_VGOIP);
+		else
+			env_set("hostname", CFG_BOARD_MIAE);
+		break;
+
+	default:
+		env_set("config", CFG_BOARD_CMPCXXX);
+		env_set("hostname", CFG_BOARD_CMPCXXX);
+		break;
+	}
+}
+
+void iop_setup_common(void)
+{
+	u8 type = in_8(ADDR_FPGA_R_BASE);
+
+	if (type == TYPE_MCR)
+		iop_setup_mcr();
+	else if (type == TYPE_MIAE)
+		iop_setup_miae();
+}
diff --git a/board/cssi/common/common.h b/board/cssi/common/common.h
index 9660898..c5ecb03 100644
--- a/board/cssi/common/common.h
+++ b/board/cssi/common/common.h
@@ -3,7 +3,13 @@
 #ifndef _BOARD_CSSI_COMMON_H
 #define _BOARD_CSSI_COMMON_H
 
-void ft_cleanup(void *blob, unsigned long id, const char *prop, const char *compatible);
 int read_eeprom(u8 *din, int len);
+int ft_board_setup_common(void *blob);
+void ft_board_setup_phy3(void);
+int checkboard_common(void);
+void misc_init_r_common(void);
+void iop_setup_common(void);
+void iop_setup_mcr(void);
+void iop_setup_miae(void);
 
 #endif /* _BOARD_CSSI_COMMON_H */